Latest Verification Validation Engineer jobs in Santa Clara, CA

39 Verification Validation Engineer Jobs in Santa Clara, CA

New Product Development Engineer Kelly - Santa Clara, CA, United States engineers to help support the sub-system quality engineering team. Responsibilities: Support review of design verification protocols/reports, test method validation, test fixture design review/qualification 12 days ago
Design Verification Engineer Mirafra Technologies - Santa Clara, CA, United States and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM ○ Debug RTL and Gate simulations and work with design engineers to verify fixes. ○ Write diagnostics for validation 20 days ago
Mobile Chipset Engineer Qualcomm - Santa Clara, CA design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration USD 165,000.00 - 247,000.00 per year 10 days ago
CPU Processor Performance Verification Engineer Apple - Santa Clara, California, United States with excellent communication and presentation skills and able to work independently on the owned unit Description Description As a Chip Performance Engineer owning the verification of a certain area of performance 25 days ago
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Intern - Automotive/Robotics Systems Engineer PlusAI Inc - Santa Clara, California to Verification and Validation for the suite of Driving Automation features developed by Plus. Responsibilities: Work with developers, systems engineers and product managers to define System Requirements for up 8 days ago
Graphics Modeling Engineer Apple - Santa Clara, CA . This includes writing models for functional development and verification of a GPU design, performance exploration, performance validation, and power estimation. You will collaborate closely with the architecture USD 170,700.00 - 300,200.00 per year More than 30 days ago
Staff Quality Engineer (EE or ME) HealthCare Recruiters International - San Jose, CA, United States and system design requirements, design specifications, detailed designs, verification and validation activities, and planning documentation. Develop hardware and system-related verification and validation 12 days ago
Senior Design Verification Engineer Mirafra Technologies - San Jose, CA, United States diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC. ○ Replicate silicon bugs in simulation environments and validate fixes or SW workarounds. ○ Convert verification tests to test patterns 13 days ago
Sr. RFIC - PLL Design Engineer Apple - Sunnyvale, CA engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW USD 170,700.00 - 300,200.00 per year 25 days ago
Quality Manager Onanon - an Amphenol company - Milpitas, CA, United States · Understanding of IPC-A-610 / IPC-A- 620 a plus · Experience with Verification and Validation activities throughout the New Product Introduction process a plus Responsibilities as Quality Manager Oversee 5 days ago

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