Latest Mixed Signal Verification jobs in Santa Clara, CA

14 Mixed Signal Verification Jobs in Santa Clara, CA

Sr. Analog/Mixed-Signal IC Verification Engineer TetraMem - Accelerate The World - Fremont, CA, United States /Mixed-Signal IC Verification Engineers who are enthusiastic to find bugs! In this role, you will be responsible for the verification of analog and mixed-signal integrated circuits (ICs) using state 20 days ago
Analog IC Designer Manager Cadence Design Systems - San Jose, CA, United States At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Candidate will lead design efforts for design and development of analog/mixed signal IC 13 days ago
Principal Digital Design Engineer - Technical Lead CyberCoders - San Jose, CA from architecture and RTL to logic design - Utilize tools such as Verification, Mixed Signal, Power Management, Synthesis, static timing, SystemVerilog, ATPG, Fault Grading, SCAN, Clock-domain, BIST, DFM, TCL, Python 175,000.00 - $230,000.00 4 days ago
Senior Design Verification Engineer Quest Global - San Jose, CA, United States . Experience with AMS/Low Power verification techniques and verifying mixed signal ICs a plus Familiarity with assertion writing and formal verification is a plus. Must be a team player with good oral 21 days ago
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High Speed Transceiver IC Design Engineer Lightmatter - Mountain View, CA, United States requirements Design analog/mixed-signal blocks with a focus on transceivers and broadband circuits interfacing with silicon photonics elements Document design simulations and verifications towards formal design 11 days ago
Analog IC Design Engineer Unreal Gigs - San Jose, California , HSPICE, or similar tools. Solid understanding of semiconductor device physics, CMOS and Bipolar transistor operation, and IC fabrication processes. Experience with mixed-signal simulation and verification 11 days ago
Senior Design Verification Engineer Mirafra Technologies - San Jose, CA, United States Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA 21 days ago
Analog/Mixed-Signal IC Designer TetraMem - Accelerate The World - Fremont, CA, United States design, simulation, layout, and verification tools (e.g., Synopsys, Cadence, Mentor Graphics etc.) In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low 20 days ago
Integrated Circuit Design Engineer Unreal Gigs - San Jose, California ), using simulation tools such as Cadence Virtuoso or Synopsys HSPICE. Mixed-Signal Design: Integrate digital and analog circuits into mixed-signal IC designs, ensuring compatibility and performance 11 days ago
Sr. RFIC - PLL Design Engineer Apple - Sunnyvale, California, United States simulation (EMX, HFSS) and similar tools. Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime). Demonstrated capability to work with digital design group for an optimum 8 days ago

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