Latest Design Verification Engineer jobs in Santa Clara, CA (page 2)

136 Design Verification Engineer Jobs in Santa Clara, CA - page 2

Senior Electrical Engineer SSOE Group - Santa Clara, CA, United States with other design disciplines (Mechanical, Structural, Process/Chemical, Architectural, etc.) for design package needs. Effectively lead, direct, and mentor associate engineers and designers, with an emphasis 6 days ago
Design Verification Engineer: 24-00933 Akraya, Inc. - Santa Clara, California "Akraya is an award-winning IT staffing firm consistently recognized for our commitment to excellence and a positive work environment... 9 days ago
Photonic Layout Engineer OpenLight - Santa Clara, CA, United States your relevant experience. Responsibilities Use custom built and commercially available tools to design layouts of photonic components and circuits. Perform physical verification of mask data to ensure design 10 days ago
Electrical Design Verification Test Engineer Arista Networks - Santa Clara, California Arista offers great benefits, work-life balance, and an environment that will challenge you to make a name for yourself in this industry... 18 days ago
Senior ASIC Design Engineer - Memory Controller NVIDIA - Santa Clara, California controllers and SOCs. In this position, you will have the opportunity to be responsible for the micro-architecture and design including RTL design, synthesis, functional verification and timing analysis using 2 days ago
Design Verification Engineer with UVM,OVM, SystemVerilog & Python PDDN Inc - Santa Clara, CA Role: Design Verification Engineer Location: Santa Clara, CA Interview: Phone/Skype Job Type: Contract Background check: Mandatory Meet and great: Mandatory UVM/OVM/SystemVerilog/Python/C/C USD 70 to 75 23 days ago
Senior ASIC Design Engineer - Memory Controller NVIDIA - Santa Clara, California controllers and SOCs. In this position, you will have the opportunity to be responsible for the micro-architecture and design including RTL design, synthesis, functional verification and timing analysis using 5 days ago
CPU Top-Level Verification Engineer Apple - Santa Clara, CA or SystemVerilog Programming/scripting skills (C, C++, Python)Problem solving skills Description As a CPU top-level design verification engineer owning the verification methodology, tools, and flow of a high USD 170,700.00 - 300,200.00 per year 13 days ago
CPU Top-Level Verification Engineer Apple - Santa Clara, California, United States , with a critical impact on getting high quality products to millions of customers quickly. Description Description As a CPU top-level design verification engineer owning the verification methodology, tools, and flow 13 days ago
CPU DFT Verification Engineer Apple - Santa Clara, California, United States . Description Description As a DFT Verification Engineer, you will have the following responsibilities: - Work closely with architecture, RTL designers, and DFT designers on verifying the functionality 13 days ago

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