146 Verification Engineer Jobs in Redwood City, CA
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Senior ASIC Verification Engineer USA Tech Recruitment - San Jose, CA, United States Are you an ASIC Verification Engineer that is on the market for a new opportunity at a highly funded and expanding startup, working on cutting edge projects at the forefront of autonomous driving 2 days ago
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Design Verification Engineer Net2Source Inc. - Santa Clara, CA, United States – Right Price and acting as a Career Coach to our consultants. Role: Design Verification Engineer Location: Santa Clara, CA -Onsite Duration: Long Term Contract Note: Current role is with our direct client 2 days ago
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Software Verification Engineer II - Onsite VIVA USA INC - Sunnyvale, CA Title: Software Verification Engineer II - Onsite Mandatory skills: Python SQL Web Application testing Automation Linux ,Linux commands. Description: 4-6 yrs. experience needed. Skills required $48 - $53 2 days ago
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Design Verification Engineer LTIMindtree - Mountain View, CA, United States . For more information, please visit Job Title: Design Verification Engineer Work Location Mountain View CA Job Description SOC level testbench development. UVM Environment and VIP integration. C/C++ based 14 days ago
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SOC Verification Engineer HCLTech – Engineering and R&D Services - Santa Clara, CA, United States , Technology and Services, Telecom and Media, Retail and CPG, and Public Services. To learn how we can supercharge progress for you, visit SOC Verification Engineer Santa Clara, CA Job Description SOC 7 days ago
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ASIC Design Verification Engineer Mobiveil Technologies Inc. - Los Altos, CA, US • Experience with verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection... 4 days ago
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Sr. Analog/Mixed-Signal IC Verification Engineer TetraMem - Accelerate The World - Fremont, CA, United States /Mixed-Signal IC Verification Engineers who are enthusiastic to find bugs! In this role, you will be responsible for the verification of analog and mixed-signal integrated circuits (ICs) using state 7 days ago
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Design Verification Engineer Mirafra Technologies - Santa Clara, CA, United States Looking to add DV Engineers in Irvine, San Diego and Santa Clara. On going needs additional 10 engineers in team. Position detail: SOC verification Experience level : 5-20 years Architect block 7 days ago
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Software Verification Engineer Peer Consulting - Palo Alto, CA, US Verification Engineer Location: Palo Alto CA. (3 days from Office, Hybrid) Duration: 6+ Months Years of Experience: 8+ Yrs. Job Description: We are seeking an exceptionally skilled software testing lead More than 30 days ago
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Design Verification Engineer Capgemini Engineering - Santa Clara, CA, United States We are seeking a Design Verification Engineer with below skills. Total 10 years of experience in UVM based verification. System Verilog assertions experience. Familiarity with C/C++ model integration 10 days ago
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