24 Asic Verification Engineer Jobs in Fremont, CA - page 2
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Mobile Chipset Engineer Qualcomm - Santa Clara, CA . Qualcomm Engineers collaborate with cross-functional groups to determine product execution path. Minimum Qualifications: Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC USD 165,000.00 - 247,000.00 per year 14 days ago
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Design Verification Engineer Theery - San Jose, CA, United States projects. Position Overview: As a Design Verification Engineer, you will play a crucial role in ensuring the functional correctness and quality of our ASIC designs. You will be responsible for developing 13 days ago
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Senior Design Verification Engineer USA Tech Recruitment - San Jose, CA, United States Senior ASIC Verification Engineer | AI Start-up | AI interference Solutions / Autonomous Driving | San Jose Are you a Senior-level Verification Engineer with experience or looking to work 19 days ago
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Senior Verification engineer Two95 International Inc. - Sunnyvale, California Hi, Title: Lead / Senior Verification engineer Location: San Jose, CA / Santa Clara, CA Duration: 6+ Months Rate: $Open Skills: UVM and System Verilog Requirement:. • 5+ or more years of proven 13 days ago
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CPU Design Verification Engineer Prodapt ASIC services (Formerly Innovative Logic) - Mountain View, CA, United States design center (ODC) or staff augmentation. We're seeking a CPU Design Verification Engineer with a strong background in UVM-based verification and experience in working with complex ARM/RISCV/x86 CPU based 19 days ago
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Design Verification Engineer Mirafra Technologies - Santa Clara, CA, United States of FPGA prototype (pre-tapeout) and ASIC. ○ Replicate silicon bugs in simulation environments and validate fixes or SW workarounds. ○ Convert verification tests to test patterns and assist Test Engineers 24 days ago
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ASIC Failure Analysis Engineer(has Failure Analysis experience in 7nm (nanometer) semiconductor manu Diverse Lynx - San Jose, California Duration: Fulltime Job Description: Job Title ASIC Failure Analysis Engineer Skill EIS : ASIC Frontend Verification Skill Type Marketable Minimum Experience 8 - 15 Years Qualification BACHELOR OF COMPUTER 2 days ago
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Design Verification Engineer at San Jose CA Mirafra Inc - San Jose, CA simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC. Replicate silicon bugs in simulation environments and validate fixes or SW Depends on Experience 8 days ago
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ASIC Design Engineer Apple - Cupertino, California, United States Summary Posted: May 15, 2024 Role Number: 200519284 As an ASIC Design Engineer, the individual’s primary responsibility will be RTL design. This will include chip architecture definition, block 10 days ago
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Design Verification Engineer Park Lane Recruitment Ltd - Milpitas, California DESIGN VERIFICATION ENGINEER -CALIFORNIA -USA JOB DESCRIPTION: We are seeking a highly skilled Design Verification Engineer to join ourclient that develops and delivers ASIC and SoC solutions 24 days ago
Top locations
- San Jose, CA (11)
- Cupertino, CA (3)
- Milpitas, CA (2)
- Mountain View, CA (2)
- Santa Clara, CA (2)
- Dublin, CA (1)
- Brentwood, CA (1)
- San Francisco, CA (1)
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