21 Foundry Jobs in Cupertino, CA
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CAD STA Technologist Apple - Sunnyvale, California, United States teams to specify all foundry & third-part IP vendor collateral requirements. - Work with the STA CAD flow developers to incorporate timing closure requirements. - Create documentation and help 8 days ago
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Foundry Interface Engineer – Analog / Display / Power Technologies Apple - Cupertino, California, United States . You will work at an exciting silicon design group that is responsible for crafting state-of-the-art ASICs! We have an extraordinary opportunity for Foundry Interface Engineers. Key Qualifications Key 29 days ago
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Component Quality Engineer Apple - Cupertino, CA . This individual is a self-driven leader that will drive Semiconductor process development (Wafer foundry and Packaging) / quality improvements as well as Program Management methodologies during NPI, ramp up USD 148,200.00 - 223,100.00 per year 25 days ago
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Custom Silicon Management Engineering Program Manager Apple - Cupertino, CA design experienceFamiliarity with driving feature set for new silicon and the silicon design processExperience with international OEM/ODM silicon foundry partnersUnderstanding of high volume production USD 160,700.00 - 282,500.00 per year More than 30 days ago
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CAD STA Technologist Apple - Cupertino, California, United States Description - Drive STA and noise methodology working closely with Design, CAD and Technology teams. - Work with Compiler & Library teams to specify all foundry & third-part IP vendor collateral requirements More than 30 days ago
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RF-mmWave Packaging Engineer L&T Technology Services - Sunnyvale, CA, United States (IPD). Liaise with foundry for Tapeout. Design PCB schematic, layout and perform circuit and 3D EM simulation. RF lab debug, tuning, performance optimization and validation. Minimum Qualification : 3 11 days ago
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Lead DFT Engineer Acceler8 Talent - Mountain View, CA, United States . Collaborate with Operations, foundry, and test partners to implement test programs on silicon and achieve production and NPI coverage goals. Requirements: Architecture-to-production experience in driving DFT 5 days ago
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Senior Engineering Director Renesas Electronics - San Jose, California and Responsibilities: Leadership of PWR process technologies Roadmap ownership across PWR BU’s to meet business needs Work across Operations and directly with foundries to realize roadmaps and strategies. Yesterday
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Principal Engineer Cadence Design Systems - San Jose, CA, United States ) Understand industry challenges in digital implementation & sign off domain with exposure to 28nm & below foundry process nodes (3) Industry Experience with Cadence EDA tools in the IC digital implementation 20 days ago
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Lead Analog Circuit Design Engineer Lumotive - San Jose, California for circuit development which includes working with foundry to design and develop transistor array, layout, reliability analysis, tape-out, silicon bring-up and successful production of the optical chip Yesterday
Top locations
- Santa Clara, CA (18)
- Sunnyvale, CA (16)
- Oakland, CA (13)
- San Jose, CA (8)
- Mountain View, CA (5)
- South San Francisco, CA (4)
- Fremont, CA (2)
- Pleasanton, CA (2)
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