Latest Cmo jobs in Cupertino, CA - JobisJob United States Mobile

75 Cmo Jobs in Cupertino, CA

SoC Power Modeling Engineer Apple - Cupertino, California, United States . Understanding of electrical properties of on-die PDN, power gating, package and system power delivery. Skills in scripting, data analysis and experience with EDA tools. Understanding of VLSI design flow and CMOS 8 days ago
Senior Analog Layout Engineer Apple - Cupertino, California, United States Qualifications Key Qualifications Key Qualifications 10+ years of experience in analog/mixed-signal layout design, with a focus on deep submicron CMOS circuits and at least 3+ years in FinFET technologies 9 days ago
Analog Layout Engineer Apple - Cupertino, CA of revolutionary Apple products? Key Qualifications Typically requires more than 8 years of experience in analog/mixed-signal layout design of deep sub-micron CMOS circuitsExperience implementing analog layouts USD 160,700.00 - 282,500.00 per year 22 days ago
SerDes Circuit Design Engineer Apple - Cupertino, California, United States , VerilogAMS) Hands-on experience to drive lab testing, debug and data analysis Hands-on experience in advanced CMOS technologies, design with FinFet technology Hands-on experience with AMS IC development 10 days ago
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Camera Electrical Engineer Apple - Cupertino, CA -volume consumer electronics system experience is preferred Knowledge of CMOS image sensor, ISP or image processing is desirable Statistical data analysis and visualization (ex. JMP) is a plus Command line USD 138,900.00 - 256,500.00 per year 21 days ago
Camera Electrical Engineer - Camera Hardware Apple - Cupertino, CA electronics system experience is preferred Knowledge of CMOS image sensor, ISP or image processing is desirable Statistical data analysis and visualization (ex. JMP) is a plus Command line interface USD 55.82 - 84.09 per hour 23 days ago
Camera Electrical Engineer Apple - Cupertino, California, United States Knowledge of CMOS image sensor, ISP or image processing is desirable Statistical data analysis and visualization (ex. JMP) is a plus Command line interface and scripting is a plus Cadence Concept and Allegro 21 days ago
CAD STA Technologist Apple - Sunnyvale, CA Qualifications STA timing closure experience of gate level and transistor level designs in advanced CMOS process. Thorough understanding of STA and methodologies for timing closure, good understanding of noise USD 170,700.00 - 300,200.00 per year 22 days ago
mmW/THz RFIC Designer Cambridge Terahertz - Sunnyvale, CA, United States with the founding and leadership team to develop the company’s core product, a THz radar imaging chipset in III/V and/or deep submicron CMOS technologies. Early work will include conceptual, feasibility 10 days ago
Custom Memory and Standard cell circuit design Quest Global - Mountain View, CA, United States circuit design in advanced CMOS technologies nodes Experience running PPA Analysis for advanced technology nodes Physical design and implementation experience (familiar with RTL2GDS flow) Scripting 4 days ago

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