Ate Test Engineer Jobs in Cupertino, CA
HCLTech – Engineering and R&D Services - Cupertino, CA, United States
, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. To learn how we can supercharge progress for you, visit Role: Electrical Engineer (ATE Test) Location : Cupertino, CA (Onsite
from: linkedin.com - 13 days ago
Apple - Cupertino, California, United States
will enable our customers to do all the things they love with their devices! We are seeking a dynamic engineer to develop ATE test programs for debug, characterization, qualification and production of SoC
from: jobs.apple.com - 24 days ago
Bowmore Group - Santa Clara, CA, United States
, or HPC products. · Strong understanding of hardware design requirements (CPM/IBIS models, SI/PI simulation) for probe-card, load-board, burn-in boards. · Hands-on experience with ATE test equipment
from: linkedin.com - 15 days ago
Tessolve - San Jose, CA, United States
Experience/knowledge in new product development, characterization, qualification and strong analytical skills, ability to problem solve...
from: linkedin.com - 8 days ago
Jobot - Santa Clara, CA
Hiring a Sr/Principal ATE Test Engineer for Publicly Traded Global Semiconductor Leader This Jobot Job is hosted by: Alvin Truong Are you a fit? Easy Apply now by clicking the "Apply Now" button USD 150,000.00 - 350,000.00 per year
from: Dice.com (+1 source) - Yesterday
Teledyne Microwave Solutions (TMS) - Mountain View, CA, United States
/RF capabilities for current and emerging challenges. We are hiring a Test Engineer to generate microwave test procedures, develop automated test equipment (ATE) stations, and support new product
from: linkedin.com - 6 days ago
Mirafra Technologies - San Jose, CA, United States
and assist Test Engineers on ATE vector bringup. ○ Evaluate latest verification methodologies and develop scripts etc. to automate verification flows.
from: linkedin.com - 6 days ago
Jobot - Santa Clara, CA
a team of test engineers in defining ATE test hardware and software and supporting the launch of new products into high volume production. This includes board-level hardware design, algorithm development USD 150,000.00 per year
from: Dice.com (+1 source) - 3 days ago
Mirafra Technologies - Santa Clara, CA, United States
of FPGA prototype (pre-tapeout) and ASIC. ○ Replicate silicon bugs in simulation environments and validate fixes or SW workarounds. ○ Convert verification tests to test patterns and assist Test Engineers
from: linkedin.com - 13 days ago
Intelliswift Software - San Jose, CA, United States
, including MBIST, TAP, SerDes and other IP DFT integration - Working closely with STA and DI Engineers design closure for test - Generating, Verifying & Debugging Test vectors before tape release. - Validating
from: linkedin.com - 12 days ago
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