Physical Design Engineer Jobs in California
Sintegra Inc. - San Jose, CA, United States
At Sintegra Inc. we are seeking a skilled Physical Design Engineer to join our team in San Jose, CA. The ideal candidate will have a strong background in block-level design from RTL-to-GDSII
from: linkedin.com - 6 days ago
Agile Global Solutions, Inc - , CA, United States
Apply Today!!! We are Looking for a Physical Design Engineer to join our team Physical Design Engineer 100% Remote • Requirements: US Citizen • Experience: 10yrs+ Description: Responsible for doing
from: linkedin.com - 13 days ago
Advanced Micro Devices, Inc - Santa Clara, California
and library teams) to explore optimizations to the design. Technical lead of three to five senior level engineers PREFERRED EXPERIENCE: ASIC Physical Design from RTL to GDSII Excellent analytical and problem
Register your RESUMEfrom: resume-library.com - 2 days ago
Intelliswift Software - Burlingame, CA, United States
, RDC, Synthesis, STA, Power). Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them
from: linkedin.com - 13 days ago
ACL Digital - San Jose, CA, United States
Position: Physical Design Engineer Location: San Jose, CA / Austin, TX Job Description: Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks
from: linkedin.com - 14 days ago
ApTask - San Jose, California
, able to work independently or as a team player Roles & Responsibilities: Hardware Design Engineer, your main responsibilities will include: Solid understanding of physical design flows level netlist
Register your RESUMEfrom: resume-library.com - 4 days ago
Acceler8 Talent - , CA, United States
. They are actively looking for a Physical Design Engineer Responsibilities: Drive their silicon and physical design methodology, ensuring scalability across various design levels. Take ownership of entire subsystems
from: linkedin.com - 14 days ago
Ursus, Inc. - San Jose, CA, United States
STA Physical Design Engineer LOCATION : San Jose, CA (hybrid 3 days onsite) DURATION: 6+ Months Description: Perform static timing analysis (STA) and timing optimization, generate and verifies timing
from: linkedin.com (+1 source) - 20 days ago
Diverse Lynx - Sunnyvale, California
Job Title: Physical Design Engineer Location: Sunnyvale, CA JD: " 10+ years of hands-on experience for block level Implementation activities(Netlist to GDS II and Signoff). " Experience in 7nm or 5nm
Register your RESUMEfrom: resume-library.com - 4 days ago
L&T Technology Services - Sunnyvale, CA, United States
Hands-on tape-out experience performing timing and physical verification closure on 5nm FinFET TSMC process or similar/lower technology...
from: linkedin.com - 20 days ago
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